Rapidus prices its 2nm wafers ~30% below TSMC ahead of a 2027 launch

Rapidus CEO Atsuyoshi Koike set 2nm-class wafer pricing at ¥3-3.5 million (~$18,550-$21,635), roughly 30% below TSMC's rumored ~$30,000 per N2 wafer, ahead of high-volume production in late 2027. Price is one of the few levers Rapidus holds against TSMC — by the time its single Hokkaido fab reaches meaningful volume in 2028, TSMC will have moved to N2P and A16, backed by a silicon-proven design ecosystem no rival yet matches.

Source: tomshardware.com ↗

At present, Rapidus is looking at charging ¥3 million – ¥3.5 million ($18,550 - $21,635) per wafer processed using its 2nm-class fabrication process, which is significantly below TSMC's rumored quote of around $30,000 per N2 wafer.

Tom's Hardware

Why this matters

→ Rapidus undercuts TSMC by 30% on 2nm wafer pricing to compete on cost.
→ Strategy masks fundamental disadvantage: single fab versus TSMC's mature multi-fab ecosystem.
→ Pricing alone may not overcome TSMC's design platform and process maturity lead.

Discount gambit